Magnetic shielding for integrated circuits

ABSTRACT

A method and apparatus which provide one or more electromagnetic shield layers for integrated circuit chips containing electromagnetic circuit elements are disclosed. The shield layers may be in contact with the integrated circuit chip, including magnetic memory structures such as MRAMs, or in a flip-chip carrier, or both. A printed circuit board which supports the chip may also have one or more shield layers.

FIELD OF THE INVENTION

[0001] The present invention relates to a method and apparatus forshielding electromagnetic integrated circuits from external magneticfields.

BACKGROUND OF THE INVENTION

[0002] In conventional packaging techniques, an integrated circuit chipor die is first attached to a carrier and then contacts of both the dieand the carrier are electrically connected. One such packaged device,called a flip-chip device, requires a semiconductor chip to be flippedand bonded with a carrier, so that contacts of the chip directly bond tocontacts of the carrier. Thus, both die bonding and interconnection aresimultaneously accomplished.

[0003] A conventional bond flip-chip device 10 including an integratedcircuit chip or die 30 and a flip-chip carrier 20 is illustrated inFIG. 1. The flip-chip carrier 20 is fabricated from a substrate 12, aninsulating layer 14, a plurality of conductive traces 15 (FIG. 2) and anelastomeric layer 16. The conductive traces 15 may be located within oron the insulating layer 14 in a variety of ways, for example, bybuilding up the conductive traces 15 on the insulating layer 14 throughelectrolytic deposition.

[0004] The conductive traces 15 (FIG. 2) are each electrically connectedto a solder ball 28 through an inset (not shown) in the substrate 12.Although a single solder ball 28 is shown in FIG. 1, it must beunderstood that any number of solder balls 28 may be employed, as thesolder balls 28 are used to mount the flip-chip device 10 to a circuitboard or other electrical structure.

[0005] The die 30 is shown in dotted line above the flip-chip carrier20. In use, the die 30 is positioned on the elastomeric material 16 ofthe flip-chip carrier 20. The flip-chip carrier 20 is electricallyconnected with the die 30 by way of suitable conductive connectingstructures, such as, for example, solder balls 24 positioned within agap 21 of the flip-chip carrier 20. The solder balls 24 are inelectrical connection with respective conductive traces 15 and withsuitable contacts on the die 30.

[0006] Recently, very-high density magnetic memories, such as magneticrandom access memories (MRAMs), have been proposed to be integrated withCMOS circuits. This integration has also complicated the packaging ofsuch devices, as the packaging must have a longer lifetime, betterelectrical performance, as well as more efficient heat dissipation.

[0007] A typical multilayer-film MRAM includes a plurality of bit ordigit lines intersected by a plurality of word lines. At eachintersection, layers of ferromagnetic film separated by a non-magneticfilm are interposed between the corresponding bit line and word line toform a memory cell. When in use, an MRAM cell stores information asdigital bits, the logic value of which depends on the states ofmagnetization of the thin magnetic multilayer films forming each memorycell. As such, the MRAM cell has two stable magnetic configurations,high resistance representing, for example, a logic state 0 and lowresistance representing, for example, a logic state 1. The magnetizationconfigurations of the MRAMs depend in turn on the magnetization vectorswhich are oriented as a result of electromagnetic fields applied to thememory cells. The electromagnetic fields used to read and write data aregenerated by associated CMOS circuitry. However, stray magnetic fields,which are generated external to the MRAM, may cause errors in memorycell operation when they have sufficient magnitude.

[0008] Very high-density MRAMs are particularly sensitive to straymagnetic fields mainly because the minuscule MRAM cells requirerelatively low magnetic fields for read/write operations which, in turn,depend upon the switching or sensing of the magnetic vectors. Thesemagnetic vectors are, in turn, easily affected and have the magneticorientation changed by such external stray magnetic fields.

[0009] To diminish the negative effects of the stray magnetic fields andto avoid sensitivity of MRAM devices to stray magnetic fields, thesemiconductor industry could produce memory cells requiring higherswitching electromagnetic fields than a stray field which the memorycells would typically encounter. However, the current requirements foroperating such memory cells is greatly increased because higher internalfields necessitate more current. Thus, the reliability and scalabilityof such high current devices decrease accordingly, and the use of MRAMswhich may be affected by stray magnetic fields becomes undesirable.

[0010] Accordingly, there is a need for an improved magnetic memorypackaging structure and a method of forming it, which shield againstexternal magnetic fields and which permit use of lower power levels forcircuit operations. There is also a need for a flip-chip packagingdevice for mounting a magnetic random access memory IC chip whichreduces the effects of external magnetic fields on internal memory cellstructures and operations. There is further a need for minimizing thecost of a packaging which shields a magnetic random access memory ICchip from external magnetic fields.

SUMMARY OF THE INVENTION

[0011] The present invention provides a method for fabricatingmagnetically shielded electromagnetic integrated circuit structures,such as MRAM structures. The present invention employs one or moremagnetic shields which are incorporated either on an integrated circuitchip which contains electromagnetic structures, or in a flip-chippackaging device, or in both. In one exemplary embodiment of theinvention, the electromagnetic shield is formed as one or more layers ofmagnetic field shielding material incorporated on the integrated circuitchip or in a flip-chip carrier, or both. In another exemplaryembodiment, a printed circuit board supporting the flip-chip packagingmay also include shielding material.

[0012] These and other features and advantages of the invention will bemore clearly apparent from the following detailed description which isprovided in connection with accompanying drawings and which illustratesexemplary embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013]FIG. 1 is a perspective view of a conventional flip-chip device.

[0014]FIG. 2 is a top view of the conventional flip-chip device of FIG.1.

[0015]FIG. 3 is a perspective view of an integrated circuit packageassembly in accordance with a first exemplary embodiment of the presentinvention.

[0016]FIG. 4 is a side view of the package assembly of FIG. 3.

[0017]FIG. 5 is a side view of the package assembly of FIG. 3 and inaccordance with a second exemplary embodiment of the present invention.

[0018]FIG. 6 is a side view of the package assembly of FIG. 3 and inaccordance with a third exemplary embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] In the following detailed description, reference is made tovarious specific embodiments in which the invention may be practiced.These embodiments are described with sufficient detail to enable thoseskilled in the art to practice the invention, and it is to be understoodthat other embodiments may be employed, and that structural andelectrical changes may be made without departing from the spirit orscope of the present invention.

[0020] Referring now to the drawings, where like elements are designatedby like reference numerals, FIGS. 3-6 illustrate exemplary embodimentsof the present invention. FIG. 3 depicts an integrated circuit (IC)package assembly 100 at an intermediate stage of processing. Asemiconductor chip or die 300 includes an array of internalelectromagnetic structures, such as MRAM cells and access circuitry, andis shown in dotted line above a flip-chip carrier 200.

[0021] The flip-chip carrier 200 is fabricated from a substrate 120, aninsulating layer 140, a plurality of conductive traces (not shown) andan elastomeric layer 160. The substrate 120 is typically formed of amaterial with high mechanical stability at high temperature. Thesubstrate 120 may be a flexible tape such as, for example, a polyimidetape. Two commercially available polyimide tapes, KAPTON® from E. I.DuPont Nemours and Company and UPILEX® from Ube Industries, Ltd., can beemployed to form the substrate 120. The elastomeric layer 160 may beformed of a silicone or a silicone-modified epoxy.

[0022] The conductive traces may be located within or on the insulatinglayer 140 in a variety of ways. One way, which is an addition method, isto build up the conductive traces on the insulating layer 140 throughelectrolytic deposition. The electrolytic deposition may be accomplishedwith a mask or, if performed without a mask, a subsequent etching stepmay be employed to create the conductive traces. Other suitable methodsinclude sputter coating and laminating a sheet of conductive material,such as copper, and etching away excess copper to form the traces.

[0023] The conductive traces are each electrically connected to solderballs 280 through an inset (not shown) in the substrate 120. The solderballs 280 are used to mount the flip-chip device carrier 200 with thechip 300 to a circuit board or other electrical structure, as it will bedescribed in more detail below.

[0024] As shown in FIG. 3, the chip 300, including magnetic memorystructures such as MRAM cells, is shown in dotted line above theflip-chip carrier 200. In use, the chip 300 is positioned on theelastomeric material 160 of the flip-chip carrier 200, as illustrated inFIG. 4. As known in the art, the flip-chip carrier 200 is electricallyconnected with the chip 300 by way of suitable conductive connectingstructures, such as, for example, solder balls 240 positioned within agap 210 of the carrier 200. The solder balls 240 are in electricalconnection with respective conductive traces 150 (not shown) and withsuitable contacts on the chip 300.

[0025] Referring now to FIGS. 3-4, a first magnetic shielding layer 110is provided for shielding the chip 300 from external magnetic fielddisturbances. According to a first exemplary embodiment of the presentinvention, the first magnetic shielding layer 110 is formed on the backsurface of the semiconductor chip 300, that is the surface that isopposite to a front surface of the semiconductor chip 300 or the surfacethat directly contacts the flip-chip carrier 200.

[0026] The first magnetic shielding layer 110 comprises a magneticshielding material which can be formed, for example, of an electricallynon-conductive material with permeability higher than that of air orsilicon. As such, the preferred choice for the magnetic shieldingmaterial is a non-conductive magnetic oxide, for example, a ferrite suchas MFe₂O₄, wherein M=Mn, Fe, Co, Ni, Cu, or Mg, among others.Manganites, chromites and cobaltites may be used also, depending on thedevice characteristics and specific processing requirements. Further,the magnetic shielding material may be also composed of conductivemagnetic particles, for example nickel, iron or cobalt particles, whichare incorporated into a nonconductive base material, such as a glasssealing alloy or a polyimide. Alternatively, the magnetic shieldingmaterial may be formed of a film or layer of conductive magneticmaterial, such as nickel, cobalt, iron, Permalloy, or Mumetal, amongothers.

[0027] Next, as illustrated in FIG. 4, the flip-chip carrier 200 withthe attached chip 300 is further attached to a portion of a printedcircuit board 400 by surface mounting, for example. This way, theflip-chip carrier 200 is mounted flat on the printed circuit board 400and contacts the printed circuit board 400 through the solder balls 280,eliminating the need for holes through the printed circuit board.

[0028] As shown in FIG. 4, a flat layer 111 of magnetic shieldingmaterial may be embedded within the printed circuit board, which can beotherwise formed of a resin compound, for example, or other knownprinted circuit board material. In this case, the magnetic memorystructures of the chip 300 are first shielded by the first magneticshielding layer 110 and further shielded by the flat layer 111 of theprinted circuit board 400 for maximum protection from external straymagnetic fields.

[0029] Although FIG. 4 shows the magnetic shielding material in the formof layer 110 on the backside of chip 300 and as layer 111 embeddedwithin the printed circuit board 400, it is also possible to apply alayer of shielding material on the bottom surface of the printed circuitboard 400 instead. For example, FIG. 5 illustrates another exemplaryembodiment of the present invention, in which a bottom magneticshielding layer 112 is formed on the bottom surface of the printedcircuit board 400, together with the flat layer 111 embedded within theprinted circuit board 400.

[0030] The preferred material for the bottom magnetic shielding layer112 is a conductive Mumetal alloy comprising, for example, approximately77% nickel (Ni), 4.8% copper (Cu), 1.5% chromium (Cr) and 14.9% iron(Fe), as well as conductive magnetic particles, such as nickel or ironparticles, incorporated into a molding material, for example a glasssealing alloy or a commercially available mold compound. However,non-conductive magnetic oxide, for example a ferrite such as MFe₂O₄,wherein M=Mn, Fe, Co, Ni, Cu, or Mg, among others, may be used also, aswell as manganites, chromites and cobaltites, depending on the devicecharacteristics and processing requirements.

[0031] In yet a third embodiment of the present invention, anothermagnetic shielding layer 113 is formed of a magnetic shielding materialas part of the flip-chip carrier 200, as shown in FIG. 6. The magneticshielding layer 113 is formed between the substrate 120 and theinsulating layer 140 to further protect the MRAM devices from externalmagnetic fields and to complete the fabrication of an IC packageassembly 102 (FIG. 6). The magnetic shielding material may be differentthan, or similar to, the magnetic shielding materials for layers 110,111 and 112. Appropriate conductive vias, insulated from magneticshielding layer 113, are formed through layer 113. Again, the magneticshielding material may be preferably a non-conductive magnetic oxide,for example a ferrite such as MFe₂O₄, wherein M=Mn, Fe, Co, Ni, Cu, orMg, among others, or a manganite, chromite or cobaltite. Further, themagnetic shielding material may be also composed of magnetic particles,for example nickel, iron or cobalt particles, which are incorporatedinto a base material such as a glass sealing alloy or a commerciallyavailable mold compound. Since nickel is conductive, however, theconcentration of nickel particles in the glass alloy should be lowenough so that the shielding material does not form a continuousconductor, unless appropriate conductive vias electrically insulatedfrom the magnetic layer are used.

[0032] Although the exemplary embodiments described above refer tospecific magnetic shielding materials, it must be understood that theinvention is not limited to the materials described above, and othermagnetic shielding materials, such as ferromagnetics like nickel-iron(Permalloy), cobalt-nickel-iron, nickel or iron may be used also.

[0033] In addition, the magnetic shielding material forming the variousshielding layers described above may also comprise a mold compound, suchas a plastic compound, with conductive magnetic particles therein. Forexample, conductive magnetic particles of, for example, nickel, iron,and/or cobalt, may be suspended in a matrix material, such as a plasticcompound, at a concentration that does not allow the particles to toucheach others. Alternatively, the magnetic shielding material may comprisea molding material including non-conductive particles of, for example,non-conductive magnetic oxides and/or Mumetal alloys. Mumetal alloys maycomprise, for example, approximately 77% nickel (Ni), 4.8% copper (Cu),1.5% chromium (Cr) and 14.9% iron (Fe).

[0034] Further, although the exemplary embodiments described above referto specific locations where the shielding material is applied to a chip,it is also possible to apply the shielding material in other locations.For example, it is also possible to apply a layer of shielding materialon both the top and bottom surfaces of the printed circuit board 400, oron the top and bottom surfaces together with a shielding materialembedded within the printed circuit board. Further, a plurality oflayers of material could be employed for shielding the magnetic memoriesstructures, one on each side of chip 300, or layers of the same ordifferent shielding materials which overlap each other may be used onone or both sides of chip 300, flip-chip carrier 200 and/or circuitprinted board 400. In addition, the specific shape of the shieldingmaterial is not limited to that shown in FIGS. 3-6 and other shapes,configurations, or geometries may be employed. Also, the chip 300 andassociated flip-chip carrier 100 may be encapsulated in a flip-chippackage which is mountable through solder balls 180 to a printed circuitboard.

[0035] The present invention is thus not limited to the details of theillustrated embodiments and the above description and drawings are onlyto be considered illustrative of exemplary embodiments which achieve thefeatures and advantages of the present invention. Modifications andsubstitutions to specific process conditions and structures can be madewithout departing from the spirit and scope of the present invention.Accordingly, the invention is not to be considered as being limited bythe foregoing description and drawings, but is only limited by the scopeof the appended claims.

What is claimed as new and desired to be protected by Letters Patent ofthe United States is:
 1. An integrated circuit structure comprising: atleast one integrated circuit chip containing structures which may beaffected by external magnetic fields, said integrated circuit chiphaving a front surface and a back surface, said front surface beingsupported by a chip carrier; and a magnetic field shielding material incontact with said back surface of said chip.
 2. The structure of claim1, wherein said shielding material is in the form of a first layer ofsaid magnetic field shielding material on said back surface.
 3. Thestructure of claim 1, wherein said shielding material comprises amagnetic material selected from the group consisting of ferrites,manganites, chromites and cobaltites.
 4. The structure of claim 3,wherein said magnetic material comprises MFe₂O₄, wherein M is at leastone atom selected from the group consisting of Mn, Fe, Co, Ni, Cu, andMg.
 5. The structure of claim 3, wherein said magnetic materialcomprises a material which includes conductive particles.
 6. Thestructure of claim 5, wherein said magnetic material comprises amaterial which includes nickel particles.
 7. The structure of claim 5,wherein said magnetic material comprises a material which includes ironparticles.
 8. The structure of claim 5, wherein said magnetic materialcomprises a material which includes cobalt particles.
 9. The structureof claim 1, wherein said chip contains a magnetic memory structure. 10.The structure of claim 9, wherein said magnetic memory structure is amagnetic random access memory device.
 11. The structure of claim 1,wherein said chip carrier is a flip-chip carrier.
 12. The structure ofclaim 11, wherein said flip-chip carrier further comprises a secondmagnetic field shielding layer.
 13. The structure of claim 12, whereinsaid second magnetic field shielding layer comprises a magnetic materialselected from the group consisting of ferrites, manganites, chromitesand cobaltites.
 14. The structure of claim 13, wherein said magneticmaterial comprises MFe₂O₄, wherein M is at least one atom selected fromthe group consisting of Mn, Fe, Co, Ni, Cu, and Mg.
 15. The structure ofclaim 13, wherein said magnetic material comprises a material whichincludes conductive particles.
 16. The structure of claim 15, whereinsaid magnetic material comprises a material which includes nickelparticles.
 17. The structure of claim 15, wherein said magnetic materialcomprises a material which includes cobalt particles.
 18. The structureof claim 15, wherein said magnetic material comprises a material whichincludes iron particles.
 19. The structure of claim 11 furthercomprising a printed circuit board having an upper surface and a bottomsurface, said upper surface supporting said flip-chip carrier.
 20. Thestructure of claim 19, wherein said printed circuit board furthercomprises a third magnetic field shielding layer.
 21. The structure ofclaim 20, wherein said third magnetic field shielding layer is locatedon said upper surface of said printed circuit board.
 22. The structureof claim 20, wherein said third magnetic field shielding layer islocated on said bottom surface of said printed circuit board.
 23. Thestructure of claim 20, wherein said third magnetic field shielding layeris embedded within said printed circuit board.
 24. The structure ofclaim 20, wherein said third magnetic field shielding layer comprisesMFe₂O₄, wherein M is at least one atom selected from the groupconsisting of Mn, Fe, Co, Ni, Cu, and Mg.
 25. The structure of claim 20,wherein said magnetic material comprises a material which includesconductive particles.
 26. The structure of claim 25, wherein saidmagnetic material comprises a material which includes nickel particles.27. The structure of claim 20, wherein said printed circuit boardfurther comprises a fourth magnetic field shielding layer in contactwith said bottom surface, said third magnetic field shielding layerbeing embedded within said printed circuit board.
 28. The structure ofclaim 27, wherein each of said fourth and third magnetic field shieldinglayers comprises a magnetic material selected from the group consistingof ferrites, manganites, chromites and cobaltites.
 29. The structure ofclaim 28, wherein said magnetic material comprises MFe₂O₄, wherein M isat least one atom selected from the group consisting of Mn, Fe, Co, Ni,Cu, and Mg.
 30. The structure of claim 28, wherein said magneticmaterial comprises a material which includes conductive particles. 31.The structure of claim 30, wherein said magnetic material comprises amaterial which includes nickel particles.
 32. An integrated circuit chipcontaining structures which may be affected by external magnetic fields,said chip comprising a magnetic field shielding material in contact witha surface of said chip.
 33. The integrated circuit chip of claim 32,wherein said magnetic field shielding material comprises a magneticmaterial selected from the group consisting of ferrites, manganites,chromites and cobaltites.
 34. The integrated circuit chip of claim 33,wherein said magnetic material comprises MFe₂O₄, wherein M is at leastone atom selected from the group consisting of Mn, Fe, Co, Ni, Cu, andMg.
 35. The integrated circuit chip of claim 33, wherein said magneticmaterial comprises a material which includes conductive particles. 36.The integrated circuit chip of claim 35, wherein said magnetic materialcomprises a material which includes nickel particles.
 37. The integratedcircuit chip of claim 35, wherein said magnetic material comprises amaterial which includes iron particles.
 38. The integrated circuit chipof claim 35, wherein said magnetic material comprises a material whichincludes cobalt particles.
 39. The integrated circuit chip of claim 32,wherein said chip contains a magnetic memory structure.
 40. Theintegrated circuit chip of claim 39, wherein said magnetic memorystructure is a magnetic random access memory device.
 41. A chip carrierfor supporting an integrated circuit chip containing structures whichmay be affected by external magnetic fields, said chip carriercomprising: a substrate having a top surface and a bottom surfacesupporting first conductive elements; an insulating layer over said topsurface of said substrate, said insulating layer including a pluralityof conductive traces which are connected to said first conductiveelements; a chip support surface over said insulating layer; secondconductive elements for connection between contacts of a chip supportedon said support surface and said conductive traces; and a layer ofmagnetic field shielding material.
 42. The chip carrier of claim 41,wherein said magnetic field shielding material comprises a magneticmaterial selected from the group consisting of ferrites, manganites,chromites and cobaltites.
 43. The chip carrier of claim 42, wherein saidmagnetic material comprises MFe₂O₄, wherein M is at least one atomselected from the group consisting of Mn, Fe, Co, Ni, Cu, and Mg. 44.The chip carrier of claim 42, wherein said magnetic material comprises amaterial which includes conductive particles.
 45. The chip carrier ofclaim 44, wherein said magnetic material comprises a material whichincludes nickel particles.
 46. The chip carrier of claim 44, whereinsaid magnetic material comprises a material which includes ironparticles.
 47. The chip carrier of claim 44, wherein said magneticmaterial comprises a material which includes cobalt particles.
 48. Thechip carrier of claim 41, wherein said layer of magnetic field shieldingmaterial is located in between said top surface of said substrate andsaid insulating layer.
 49. The chip carrier of claim 41, wherein saidlayer of magnetic field shielding material is located on said bottomsurface of said substrate.
 50. The chip carrier of claim 41, whereinsaid layer of magnetic field shielding material is located over said topsurface of said insulating layer.
 51. The chip carrier of claim 41,wherein said integrated circuit chip contains a magnetic memorystructure.
 52. The chip carrier of claim 51, wherein said magneticmemory structure is a magnetic random access memory device.
 53. Aprinted circuit board comprising: a support body having a top surfaceand a bottom surface, said top surface being in contact with a flip-chipcarrier; and at least one layer of a magnetic field shielding material.54. The printed circuit board of claim 53, wherein said layer ofmagnetic field shielding material is located on said top surface of saidsupport body.
 55. The printed circuit board of claim 53, wherein saidlayer of magnetic field shielding material is located on said bottomsurface of said support body.
 56. The printed circuit board of claim 53,wherein said layer of magnetic field shielding material is located onboth said top and bottom surfaces of said support body.
 57. The printedcircuit board of claim 53, wherein said layer of magnetic fieldshielding material is embedded within said support body.
 58. The printedcircuit board of claim 53, wherein said layer of magnetic fieldshielding material comprises a magnetic material selected from the groupconsisting of ferrites, manganites, chromites and cobaltites.
 59. Theprinted circuit board of claim 53, wherein said magnetic materialcomprises MFe₂O₄, wherein M is at least one atom selected from the groupconsisting of Mn, Fe, Co, Ni, Cu, and Mg.
 60. The printed circuit boardof claim 53, wherein said magnetic material comprises a material whichincludes conductive particles.
 61. The printed circuit board of claim60, wherein said conductive particles are selected from the groupconsisting of nickel particles, iron particles, and cobalt particles.62. The printed circuit board of claim 53, further comprising anintegrated circuit chip which contains a magnetic memory structuremounted on said top surface of said support body.
 63. The circuitprinted board of claim 62, wherein said magnetic memory structure is amagnetic random access memory device.
 64. An integrated circuitstructure comprising: a die electrically connected to a die carrier,said die being in contact with a first layer of magnetic field shieldingmaterial, said die further comprising a magnetic random access memorydevice; and a printed circuit board electrically connected to said diecarrier, said printed circuit board being in contact with a second layerof magnetic field shielding material.
 65. The integrated circuitstructure of claim 64, wherein said die carrier comprises a third layerof magnetic field shielding material.
 66. The integrated circuitstructure of claim 65, wherein each of said first, second and thirdlayers of magnetic field shielding material comprises a magneticmaterial selected from the group consisting of ferrites, manganites,chromites and cobaltites.
 67. The integrated circuit structure of claim66, wherein said magnetic material comprises MFe₂O₄, wherein M is atleast one atom selected from the group consisting of Mn, Fe, Co, Ni, Cu,and Mg.
 68. The integrated circuit structure of claim 66, wherein saidmagnetic material comprises a material which includes conductiveparticles.
 69. The integrated circuit structure of claim 68, whereinsaid conductive particles are selected from the group consisting ofnickel particles, iron particles, and cobalt particles.
 70. A method ofpackaging a semiconductor device comprising: electrically coupling a diecarrier to a first surface of a die, said first surface being oppositeto a second surface of said die; and contacting said second surface ofsaid die with a first layer of magnetic field shielding material whichshields said die from external magnetic fields.
 71. The method of claim70 further comprising the act of electrically coupling said die carrierto a printed circuit board which has a second layer of magnetic fieldshielding material.
 72. The method of claim 71, wherein said act ofcontacting said printed circuit board with said second layer of magneticfield shielding material wherein said second layer of magnetic fieldshielding material is formed on a surface of said printed circuit board.73. The method of claim 72, wherein said second layer of magnetic fieldshielding material is formed on a top surface of said printed circuitboard.
 74. The method of claim 72, wherein said second layer of magneticfield shielding material is formed on a bottom surface of said printedcircuit board.
 75. The method of claim 72, wherein said second layer ofmagnetic field shielding material is embedded within said printedcircuit board.
 76. The method of claim 72, wherein said second layer ofmagnetic field shielding material is formed on both a bottom surface anda top surface of said printed circuit board.
 77. The method of claim 70,wherein said semiconductor device is a magnetic memory device.
 78. Themethod of claim 77, wherein said magnetic memory device is a magneticrandom access memory device.
 79. The method of claim 70, wherein saidfirst layer of magnetic field shielding material comprises a magneticmaterial selected from the group consisting of ferrites, manganites,chromites and cobaltites.
 80. The method of claim 79, wherein saidmagnetic material comprises MFe₂O₄, wherein M is at least one atomselected from the group consisting of Mn, Fe, Co, Ni, Cu, and Mg. 81.The method of claim 79, wherein said magnetic material comprises amaterial which includes conductive particles.
 82. The method of claim81, wherein said conductive particles are selected from the groupconsisting of nickel particles, iron particles, and cobalt particles.83. The method of claim 71, wherein said second layer of magnetic fieldshielding material comprises a magnetic material selected from the groupconsisting of ferrites, manganites, chromites and cobaltites.
 84. Themethod of claim 83, wherein said magnetic material comprises MFe₂O₄,wherein M is at least one atom selected from the group consisting of Mn,Fe, Co, Ni, Cu, and Mg.
 85. The method of claim 83, wherein saidmagnetic material comprises a material which includes conductiveparticles.
 86. The method of claim 85, wherein said magnetic materialcomprises a material which includes nickel particles.
 87. A method offorming a chip carrier for supporting an integrated circuit chipcontaining structures which may be affected by external magnetic fields,said method comprising: forming an insulating layer over a first surfaceof a substrate; providing a support surface for said integrated circuitchip; and providing a layer of magnetic field shielding material whichshields said integrated circuit chip from external magnetic fields. 88.The method of claim 87, wherein said layer of magnetic field shieldingmaterial is formed between said insulating layer and said first surfaceof said substrate.
 89. The method of claim 87, wherein said layer ofmagnetic field shielding material is embedded within said substrate. 90.The method of claim 87, wherein said layer of magnetic field shieldingmaterial is formed on both a bottom surface and a top surface of saidprinted circuit board.
 91. The method of claim 87, wherein saidsemiconductor device is a magnetic memory device.
 92. The method ofclaim 91, wherein said magnetic memory device is a magnetic randomaccess memory device.
 93. The method of claim 87, wherein said layer ofmagnetic field shielding material comprises a magnetic material selectedfrom the group consisting of ferrites, manganites, chromites andcobaltites.
 94. The method of claim 93, wherein said magnetic materialcomprises MFe₂O₄, wherein M is at least one atom selected from the groupconsisting of Mn, Fe, Co, Ni, Cu, and Mg.
 95. The method of claim 93,wherein said magnetic material comprises a material which includesconductive particles.
 96. The method of claim 95, wherein saidconductive particles are selected from the group consisting of nickelparticles, iron particles, and cobalt particles.